dt-bindings: dmaengine: xilinx_dma: Add binding for Xilinx MCDMA IP
authorRadhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Tue, 22 Oct 2019 17:00:19 +0000 (22:30 +0530)
committerVinod Koul <vkoul@kernel.org>
Wed, 6 Nov 2019 17:07:22 +0000 (22:37 +0530)
commit7cb1e57544e5d11e3a2742c5acb69562d02af235
tree634ec38f64e146728dba41f5bc0a6ee5e6705a4a
parent535b4b0c050b79db6a63097599fc87a156db6b2c
dt-bindings: dmaengine: xilinx_dma: Add binding for Xilinx MCDMA IP

Add devicetree binding for Xilinx AXI Multichannel Direct Memory Access
(AXI MCDMA) IP. The AXI MCDMA provides high-bandwidth direct memory
access between memory and AXI4-Stream target peripherals. The AXI MCDMA
core provides a scatter-gather interface with multiple channel support
with independent configuration.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1571763622-29281-4-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt