locking/atomic: xtensa: add preprocessor symbols
authorMark Rutland <mark.rutland@arm.com>
Mon, 5 Jun 2023 07:01:10 +0000 (08:01 +0100)
committerPeter Zijlstra <peterz@infradead.org>
Mon, 5 Jun 2023 07:57:18 +0000 (09:57 +0200)
commit7c7084f3ba4031a9c2858afed696a577fcfe41d2
treed6b4070796a62ab554b54a584755e6e69223910e
parent5bef003538ae8621c95ac6ebfd37324373fae37d
locking/atomic: xtensa: add preprocessor symbols

Some atomics can be implemented in several different ways, e.g.
FULL/ACQUIRE/RELEASE ordered atomics can be implemented in terms of
RELAXED atomics, and ACQUIRE/RELEASE/RELAXED can be implemented in terms
of FULL ordered atomics. Other atomics are optional, and don't exist in
some configurations (e.g. not all architectures implement the 128-bit
cmpxchg ops).

Subsequent patches will require that architectures define a preprocessor
symbol for any atomic (or ordering variant) which is optional. This will
make the fallback ifdeffery more robust, and simplify future changes.

Add the required definitions to arch/xtensa.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Kees Cook <keescook@chromium.org>
Link: https://lore.kernel.org/r/20230605070124.3741859-14-mark.rutland@arm.com
arch/xtensa/include/asm/atomic.h