perf/x86/intel: Add quirk for Goldmont Plus
authorKan Liang <kan.liang@linux.intel.com>
Wed, 8 Aug 2018 07:12:08 +0000 (00:12 -0700)
committerIngo Molnar <mingo@kernel.org>
Tue, 2 Oct 2018 08:14:33 +0000 (10:14 +0200)
commit7c5314b88da6d5af98239786772a1c44cc5eb67d
tree05d2b10abde07b393ea7be360fbb565efd9fadde
parentf2c4db1bd80720cd8cb2a5aa220d9bc9f374f04e
perf/x86/intel: Add quirk for Goldmont Plus

A ucode patch is needed for Goldmont Plus while counter freezing feature
is enabled. Otherwise, there will be some issues, e.g. PMI flood with
some events.

Add a quirk to check microcode version. If the system starts with the
wrong ucode, leave the counter-freezing feature permanently disabled.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: acme@kernel.org
Link: http://lkml.kernel.org/r/1533712328-2834-3-git-send-email-kan.liang@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/events/intel/core.c