arm: Fix mult autovectorization patterm for iwmmxt (PR target/99786)
Similarly to other recently-added autovectorization patterns, mult has
been erroneously enabled for iwmmxt. However, V4HI and V2SI modes are
supported, so we make an exception for them.
The new testcase is derived from gcc.dg/ubsan/pr79904.c, with
additional modes added.
I kept dg-do compile because 'assemble' results in error messages from
the assembler, which are not related to this PR:
Error: selected processor does not support `tmcrr wr0,r4,r5' in ARM mode
Error: selected processor does not support `wstrd wr0,[r0]' in ARM mode
Error: selected processor does not support `wldrd wr0,[r0]' in ARM mode
Error: selected processor does not support `wldrd wr2,.L5' in ARM mode
Error: selected processor does not support `wmulul wr0,wr0,wr2' in ARM mode
Error: selected processor does not support `wstrd wr0,[r0]' in ARM mode
Error: selected processor does not support `wldrd wr0,[r0]' in ARM mode
Error: selected processor does not support `wldrd wr2,.L8' in ARM mode
Error: selected processor does not support `wmulwl wr0,wr0,wr2' in ARM mode
Error: selected processor does not support `wstrd wr0,[r0]' in ARM mode
2021-03-29 Christophe Lyon <christophe.lyon@linaro.org>
PR target/99786
gcc/
* config/arm/vec-common.md (mul<mode>3): Disable on iwMMXT, expect
for V4HI and V2SI.
gcc/testsuite/
* gcc.target/arm/pr99786.c: New test.