net: dsa: mv88e6xxx: Improve indirect addressing performance
authorTobias Waldekranz <tobias@waldekranz.com>
Fri, 28 Jan 2022 16:26:50 +0000 (17:26 +0100)
committerDavid S. Miller <davem@davemloft.net>
Mon, 31 Jan 2022 11:29:12 +0000 (11:29 +0000)
commit7bca16b22e6a126f66f7d8d551be10815ba46fdb
treece7222aed80d444ba6a7059e66d67842b69fb47d
parent35da1dfd94847c5f1ac04ce5b5002b888c3f36ec
net: dsa: mv88e6xxx: Improve indirect addressing performance

Before this change, both the read and write callback would start out
by asserting that the chip's busy flag was cleared. However, both
callbacks also made sure to wait for the clearing of the busy bit
before returning - making the initial check superfluous. The only
time that would ever have an effect was if the busy bit was initially
set for some reason.

With that in mind, make sure to perform an initial check of the busy
bit, after which both read and write can rely the previous operation
to have waited for the bit to clear.

This cuts the number of operations on the underlying MDIO bus by 25%

Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/dsa/mv88e6xxx/chip.h
drivers/net/dsa/mv88e6xxx/smi.c