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(parent: dd93587) | patch
clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE
authorPeter De Schrijver <pdeschrijver@nvidia.com>
Wed, 3 Apr 2013 14:40:38 +0000 (17:40 +0300)
committerStephen Warren <swarren@nvidia.com>
Thu, 4 Apr 2013 22:10:42 +0000 (16:10 -0600)
commit7ba28813b41120dd67329fd04dc732ea7fef05a0
tree6ac134721cc41bbedb8679536b8020b68ebc61b8tree | snapshot
parentdd93587be8dc8acf23a0d8a23efc74a91d8f0dfecommit | diff
clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE

Tegra114 PLLC2 and PLLC3 don't have a lock enable bit. The lock bits are
always functional.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
drivers/clk/tegra/clk-pll.c diff | blob | history
drivers/clk/tegra/clk.h diff | blob | history
Domain: System / Kernel;