[RISCV] Add isel patterns for grevi, shfli, and unshfli to brev8/zip/unzip instructions.
authorCraig Topper <craig.topper@sifive.com>
Fri, 21 Jan 2022 04:43:48 +0000 (20:43 -0800)
committerCraig Topper <craig.topper@sifive.com>
Fri, 21 Jan 2022 04:43:52 +0000 (20:43 -0800)
commit7b3d30728816403d1fd73cc5082e9fb761262bce
treecd68655fa14e258dda772c57feb8794a8d2b7eb5
parent7ee1c162cc53d37f717f9a138276ad64fa6863bc
[RISCV] Add isel patterns for grevi, shfli, and unshfli to brev8/zip/unzip instructions.

Zbkb supports some encodings of the general grevi, shfli, and
unshfli instructions legal, so we added separate instructions for
those encodings to improve the diagnostics for assembler and
disassembler. To be consistent we should always use these separate
instructions whenever those specific encodings of grevi/shfli/unshfli
occur. So this patch adds specific isel patterns to override the generic
isel patterns for these cases. Similar was done for rev8 and zext.h
for Zbb previously.
llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
llvm/test/CodeGen/RISCV/rv32zbp-intrinsic.ll
llvm/test/CodeGen/RISCV/rv32zbp.ll
llvm/test/CodeGen/RISCV/rv64zbp.ll