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(parent: a80b3a8) | patch
Misc mips16 bug fixes found by gcc/gdb testsuites.
authorwilson <wilson@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 9 Nov 1998 16:50:18 +0000 (16:50 +0000)
committerwilson <wilson@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 9 Nov 1998 16:50:18 +0000 (16:50 +0000)
commit7b2d9c858cf9d0b2c3848423965e59102a06fd81
treeeeffac9b9ca0e06059c2bf394c0927aeb11a9049tree | snapshot
parenta80b3a8e5f2f58595a5a14c14f4548b6c43b8d69commit | diff
Misc mips16 bug fixes found by gcc/gdb testsuites.
* mips.c (function_prologue): When TARGET_MIPS16, adjust the register
offset in the .mask pseudo to compensate for frame pointer adjustments.
(mips16_fp_args, build_mips16_call_stub): For little endian, do not
word swap arguments moved to/from FP registers.
* mips16.S (DFREVCMP): Reverse arguments to OPCODE.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@23586 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog diff | blob | history
gcc/config/mips/mips.c diff | blob | history
gcc/config/mips/mips16.S diff | blob | history
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