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board: phytec: phycore_imx8mm: Update lpddr4_timing
authorCem Tenruh <c.tenruh@phytec.de>
Fri, 16 Jun 2023 08:28:13 +0000 (10:28 +0200)
committerStefano Babic <sbabic@denx.de>
Thu, 13 Jul 2023 09:29:40 +0000 (11:29 +0200)
commit7a478c836a243d1682b50dd82576432fc6e11825
treeade78ba2e589cc3da3161b86c8c4e710f8700aeatree | snapshot
parentff1dd520243320259b654065821b0f5cdea9f551commit | diff
board: phytec: phycore_imx8mm: Update lpddr4_timing

Update RAM Timings for 2GB RAM based on DDR Controller Configuration
Spreadsheet revision 22. Including the update of the refresh
rate to workaround errata ERR050805.

Signed-off-by: Cem Tenruh <c.tenruh@phytec.de>
board/phytec/phycore_imx8mm/lpddr4_timing.c diff | blob | history
Domain: System / Kernel;