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(parent: 4bede34) | patch
crypto: cavium/nitrox - Enable interrups for PF in SR-IOV mode.
authorSrikanth, Jampala <Jampala.Srikanth@cavium.com>
Wed, 21 Nov 2018 09:52:24 +0000 (09:52 +0000)
committerHerbert Xu <herbert@gondor.apana.org.au>
Thu, 29 Nov 2018 08:27:04 +0000 (16:27 +0800)
commit7a027b57f959660547779b6290a3b50ff1601980
treefe6026826d4222488f657074e299f1638ff8de9btree | snapshot
parent4bede34c1aa19266628b13f68db95ec4a16a6f38commit | diff
crypto: cavium/nitrox - Enable interrups for PF in SR-IOV mode.

Enable the available interrupt vectors for PF in SR-IOV Mode.
Only single vector entry 192 is valid of PF. This is used to
notify any hardware errors and mailbox messages from VF(s).

Signed-off-by: Srikanth Jampala <Jampala.Srikanth@cavium.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/cavium/nitrox/nitrox_dev.h diff | blob | history
drivers/crypto/cavium/nitrox/nitrox_isr.c diff | blob | history
drivers/crypto/cavium/nitrox/nitrox_isr.h diff | blob | history
drivers/crypto/cavium/nitrox/nitrox_sriov.c diff | blob | history
Domain: System / Kernel;