[PowerPC] Require nsz flag for c-a*b to FNMSUB
authorQiu Chaofan <qiucofan@cn.ibm.com>
Thu, 4 Jun 2020 08:30:17 +0000 (16:30 +0800)
committerQiu Chaofan <qiucofan@cn.ibm.com>
Thu, 4 Jun 2020 08:41:27 +0000 (16:41 +0800)
commit7a001a2d92a777de196eaaa070a4bfc23f40fd87
treee9b8d234316895f1ab35d8a5492dee5b2b51cc74
parentdcfa78a4ccec9772d9ff7fea536f81717cf30b24
[PowerPC] Require nsz flag for c-a*b to FNMSUB

On PowerPC, FNMSUB (both VSX and non-VSX version) means -(a*b-c). But
the backend used to generate these instructions regardless whether nsz
flag exists or not. If a*b-c==0, such transformation changes sign of
zero.

This patch introduces PPC specific FNMSUB ISD opcode, which may help
improving combined FMA code sequence.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D76585
15 files changed:
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.h
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/lib/Target/PowerPC/PPCInstrVSX.td
llvm/test/CodeGen/PowerPC/combine-fneg.ll
llvm/test/CodeGen/PowerPC/f128-fma.ll
llvm/test/CodeGen/PowerPC/fdiv.ll
llvm/test/CodeGen/PowerPC/fma-assoc.ll
llvm/test/CodeGen/PowerPC/fma-combine.ll
llvm/test/CodeGen/PowerPC/fma-ext.ll
llvm/test/CodeGen/PowerPC/fma-negate.ll
llvm/test/CodeGen/PowerPC/fma-precision.ll
llvm/test/CodeGen/PowerPC/fma.ll
llvm/test/CodeGen/PowerPC/recipest.ll
llvm/test/CodeGen/PowerPC/repeated-fp-divisors.ll