[AArch64][GlobalISel] Add post-legalizer lowering for NEON vector fcmps
authorJessica Paquette <jpaquette@apple.com>
Mon, 3 May 2021 19:21:11 +0000 (12:21 -0700)
committerJessica Paquette <jpaquette@apple.com>
Mon, 10 May 2021 22:40:06 +0000 (15:40 -0700)
commit79be9c59c6acd79fe4ac3a65eee569b3b65fc20f
treef3c77cb38dcd8edfec729446c80f94e8856d3425
parent061e071d8c9b98526f35cad55a918a4f1615afd4
[AArch64][GlobalISel] Add post-legalizer lowering for NEON vector fcmps

This is roughly equivalent to the floating point portion of
`AArch64TargetLowering::LowerVSETCC`. Main part that's missing is the v4s16 bit.

This also adds helpers equivalent to `EmitVectorComparison`, and
`changeVectorFPCCToAArch64CC`. This moves `changeFCMPPredToAArch64CC` out of
the selector into AArch64GlobalISelUtils for the sake of code reuse.

This is done in post-legalizer lowering with pseudos to simplify selection.
The imported patterns end up handling selection for us this way.

Differential Revision: https://reviews.llvm.org/D101782
llvm/lib/Target/AArch64/AArch64Combine.td
llvm/lib/Target/AArch64/AArch64InstrGISel.td
llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.cpp
llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.h
llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
llvm/test/CodeGen/AArch64/GlobalISel/lower-neon-vector-fcmp.mir [new file with mode: 0644]
llvm/test/CodeGen/AArch64/GlobalISel/select-neon-vector-fcmp.mir [new file with mode: 0644]
llvm/test/CodeGen/AArch64/neon-compare-instructions.ll