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(parent: 44d7d66) | patch
intel/fs: Introduce barycentric layout lowering pass.
authorFrancisco Jerez <currojerez@riseup.net>
Sat, 4 Jan 2020 00:12:23 +0000 (16:12 -0800)
committerFrancisco Jerez <currojerez@riseup.net>
Fri, 17 Jan 2020 21:22:59 +0000 (13:22 -0800)
commit79bd252d6e7650f2081d116a51b4baf634338648
tree04f72f94923fa2ba32805d56e7956a1ac1165f04tree | snapshot
parent44d7d66adc6a027eb9f88dae15390c2ad9a70ad4commit | diff
intel/fs: Introduce barycentric layout lowering pass.

The goal is to represent barycentrics with the standard vector layout
during optimization and particularly SIMD lowering.  Instead of
emitting the barycentric layout conversions at NIR translation time,
do it later as a lowering pass.  For the moment this is only applied
to PI messages, but we'll give the same treatment to LINTERP
instructions too.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/intel/compiler/brw_fs.cpp diff | blob | history
src/intel/compiler/brw_fs.h diff | blob | history
src/intel/compiler/brw_fs_nir.cpp diff | blob | history
Domain: Graphics System / GL;