powerepc/book3s64/hash: Align start/end address correctly with bolt mapping
authorAneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Mon, 7 Sep 2020 07:25:39 +0000 (12:55 +0530)
committerMichael Ellerman <mpe@ellerman.id.au>
Tue, 15 Sep 2020 12:13:38 +0000 (22:13 +1000)
commit79b123cdf9cf0d4a1620baa8c611962626323a08
tree9190cc9792506c01cf7bdf071fadec7238a611e5
parentbbc4f40b5322b3e0b8678619f1c613dadc811669
powerepc/book3s64/hash: Align start/end address correctly with bolt mapping

This ensures we don't do a partial mapping of memory. With nvdimm, when
creating namespaces with size not aligned to 16MB, the kernel ends up partially
mapping the pages. This can result in kernel adding multiple hash page table
entries for the same range. A new namespace will result in
create_section_mapping() with start and end overlapping an already existing
bolted hash page table entry.

commit: 6acd7d5ef264 ("libnvdimm/namespace: Enforce memremap_compat_align()")
made sure that we always create namespaces aligned to 16MB. But we can do
better by avoiding mapping pages that are not aligned. This helps to catch
access to these partially mapped pages early.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200907072539.67310-1-aneesh.kumar@linux.ibm.com
arch/powerpc/mm/book3s64/hash_utils.c
arch/powerpc/mm/book3s64/radix_pgtable.c