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(parent: 52dab5d) | patch
intel_sst: Enable clk output for SSP0 and SSP1 to allow I2S master mode
authorLouis Le Gall <louis.le.gall@intel.com>
Thu, 6 Oct 2011 15:18:27 +0000 (16:18 +0100)
committermgross <mark.gross@intel.com>
Wed, 9 Nov 2011 21:16:34 +0000 (13:16 -0800)
commit79ae1ae97639ae66af2bfc89823cb225045820f1
tree842009d84cb5bb76a0c1017ff2cc0da5d1d7b022tree | snapshot
parent52dab5df9ee6268dbbe86816602ac3257c345673commit | diff
intel_sst: Enable clk output for SSP0 and SSP1 to allow I2S master mode

Modification in sst driver probe to setup LPE SHIM register CLKCTL
and CSR to authorize SSP0 and SSP1 to output clock and use internal
clock.

Change-Id: I43a3e1ab58b366b1c9a3ff930a48387c2620eb41
Signed-off-by: Louis Le Gall <louis.le.gall@intel.com>
drivers/staging/intel_sst/intel_sst.c diff | blob | history
drivers/staging/intel_sst/intel_sst_common.h diff | blob | history
Domain: System / Kernel;