radeonsi: fix fast depth_clear_value/stencil_clear_value
authorPierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tue, 7 Mar 2023 13:53:42 +0000 (14:53 +0100)
committerMarge Bot <emma+marge@anholt.net>
Wed, 8 Mar 2023 10:56:21 +0000 (10:56 +0000)
commit79ab787a8f6bf2ea0b8a6c8d1ea057d62c77e8e1
tree41b4625fb851c173fcf08809643471f4303a4cb4
parentb75acbf88f50722d8c0c9ecc76703fddbae4a14b
radeonsi: fix fast depth_clear_value/stencil_clear_value

We need to update the when promoting from non-TC-compatible to
TC-compatible or we'll get incorrect values in the buffer.

Fixes: 9defe8aca95 ("radeonsi: implement fast Z/S clears using clear_buffer on HTILE")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8418
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21726>
src/gallium/drivers/radeonsi/si_clear.c