AMDGPU: Directly implement computeKnownBits for workitem intrinsics
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 15 Apr 2022 02:40:48 +0000 (22:40 -0400)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 22 Apr 2022 14:49:50 +0000 (10:49 -0400)
commit794a0bb547484ec33c13bd6c7c04b1dbd03d040a
treeca6eb3a49f5e4a032ba14820eeb54101241b2b56
parent40bc9112c079cfdbaa051e55833ec24f64d981a4
AMDGPU: Directly implement computeKnownBits for workitem intrinsics

Currently metadata is inserted in a late pass which is lowered
to an AssertZext. The metadata would be more useful if it was
inserted earlier after inlining, but before codegen.

Probably shouldn't change anything now. Just replacing the
late metadata annotation needs more work, since we lose
out on optimizations after these are lowered to CopyFromReg.

Seems to be slightly better than relying on the AssertZext from the
metadata. The test change in cvt_f32_ubyte.ll is a quirk from it using
-start-before=amdgpu-isel instead of running the usual codegen
pipeline.
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.h
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.workitem.id.mir [new file with mode: 0644]
llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
llvm/test/CodeGen/AMDGPU/memory_clause.ll
llvm/test/CodeGen/AMDGPU/zext-lid.ll