rtc: davinci: check BUSY bit before set TC registers
authorDario Binacchi <dariobin@libero.it>
Wed, 2 Jun 2021 20:38:01 +0000 (22:38 +0200)
committerLokesh Vutla <lokeshvutla@ti.com>
Wed, 9 Jun 2021 16:53:44 +0000 (22:23 +0530)
commit79250ef3e263ef23c16c3c06a50834f0dcca4426
tree99fd0aa16b754472f247bb4b83132d784b12c6e2
parent82a456a085facede0913a742660df9a1607d1543
rtc: davinci: check BUSY bit before set TC registers

To write correct data to the TC registers, the STATUS register must be
read until the BUSY bit is equal to zero. Once the BUSY flag is zero,
there is a 15 μs access period in which the TC registers can be
programmed.
The rtc_wait_not_busy() has been inspired by the Kernel.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210602203805.11494-5-dariobin@libero.it
drivers/rtc/davinci.c