clk: sunxi: Add Allwinner R40 CLK driver
authorJagan Teki <jagan@amarulasolutions.com>
Sun, 5 Aug 2018 05:46:33 +0000 (11:16 +0530)
committerJagan Teki <jagan@amarulasolutions.com>
Fri, 18 Jan 2019 16:49:09 +0000 (22:19 +0530)
commit78eb2a41f3e1e3d46e519f6eb51ccd4040f20f25
tree8af49ac73a5a7d1ba9fd8450fd396b7fa4ff35c1
parent03d87f5909f59523e82d6b77b7b5bcd2054547d4
clk: sunxi: Add Allwinner R40 CLK driver

Add initial clock driver for Allwinner R40.

- Implement USB bus and USB clocks via ccu_clk_gate
  for R40, so it can accessed in common clk enable
  and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
  for R40, so it can accessed in common reset deassert
  and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
drivers/clk/sunxi/Kconfig
drivers/clk/sunxi/Makefile
drivers/clk/sunxi/clk_r40.c [new file with mode: 0644]