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[ELF] Rewrite R_RISCV_ALIGN nops when r.addend%4 != 0
authorFangrui Song <i@maskray.me>
Mon, 26 Sep 2022 21:20:27 +0000 (14:20 -0700)
committerFangrui Song <i@maskray.me>
Mon, 26 Sep 2022 21:20:27 +0000 (14:20 -0700)
commit78084d9e77b9a2017e2215491b71b37c2671c292
treea16d827e5b40eaefdac5e2778bb9c8d1cf7c9b34tree | snapshot
parentb6352ef4f341b876bc01f450b31033d1fa836f0ccommit | diff
[ELF] Rewrite R_RISCV_ALIGN nops when r.addend%4 != 0

For RVC, GNU assembler and LLVM integrated assembler add c.nop followed by a
sequence of 4-byte nops. Even if remove % 4 == 0, we have to split one 4-byte
nop and therefore need to write the code sequence, otherwise we create an
incorrect c.unimp.
lld/ELF/Arch/RISCV.cpp diff | blob | history
lld/test/ELF/riscv-relax-align-rvc.s diff | blob | history
Domain: System / Toolchain;