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(parent: 096e33f) | patch
drm/amd/amdgpu: Add missing CGTS*TCC_DISABLE to 10.3 headers
authorTom St Denis <tom.stdenis@amd.com>
Wed, 7 Sep 2022 14:18:01 +0000 (10:18 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 8 Sep 2022 02:28:42 +0000 (22:28 -0400)
commit780244a2fe8a82424c85f4cb15e45d0bbeec8f26
tree6c4bb55c02214d04a5311ca7493d5de666257d20tree | snapshot
parent096e33f8ce4f4c82035edb532e8cb0883831e14bcommit | diff
drm/amd/amdgpu: Add missing CGTS*TCC_DISABLE to 10.3 headers

The TCC_DISABLE registers were not included in the 10.3 headers and
instead just placed directly in the gfx_v10_0.c source.  This patch
adds them to the headers so tools like umr can scan them and support them.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h diff | blob | history
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h diff | blob | history
Domain: System / Kernel;