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(parent: e540978) | patch
X86: optimized i64 vector multiply with constant
authorElena Demikhovsky <elena.demikhovsky@intel.com>
Tue, 16 Jun 2015 06:07:24 +0000 (06:07 +0000)
committerElena Demikhovsky <elena.demikhovsky@intel.com>
Tue, 16 Jun 2015 06:07:24 +0000 (06:07 +0000)
commit77f0e9f662c3eef7d742ad9c7f60b31aa9037c96
tree76d405c264cfca551e48429bd26a2d348f50c833tree | snapshot
parente5409783d1e13f8d7ac487aa790774b5b5a95196commit | diff
X86: optimized i64 vector multiply with constant

When we multiply two 64-bit vectors, we extract lower and upper part and use the PMULUDQ instruction.
When one of the operands is a constant, the upper part may be zero, we know this at compile time.
Example: %a = mul <4 x i64> %b, <4 x i64> < i64 5, i64 5, i64 5, i64 5>.
I'm checking the value of the upper part and prevent redundant "multiply", "shift" and "add" operations.

llvm-svn: 239802
llvm/lib/Target/X86/X86ISelLowering.cpp diff | blob | history
llvm/test/CodeGen/X86/pmul.ll diff | blob | history
Domain: System / Toolchain;