powerpc/perf: Add kernel support for new MSR[HV PR] bits in trace-imc
authorAnju T Sudhakar <anju@linux.vnet.ibm.com>
Mon, 13 Jul 2020 14:46:23 +0000 (20:16 +0530)
committerMichael Ellerman <mpe@ellerman.id.au>
Thu, 16 Jul 2020 03:12:46 +0000 (13:12 +1000)
commit77ca3951cc37727ae8361d583a30da7a1b84e427
treec4bac83d1ef6b6d7b20d2b2aebd0f2192a72ff7f
parent9a3e3dccbf4317d02d28f8f99a5d1ccce42f9922
powerpc/perf: Add kernel support for new MSR[HV PR] bits in trace-imc

IMC trace-mode record has MSR[HV PR] bits added in the third DW.
These bits can be used to set the cpumode for the instruction pointer
captured in each sample.

Add support in kernel to use these bits to set the cpumode for
each sample.

Signed-off-by: Anju T Sudhakar <anju@linux.vnet.ibm.com>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200713144623.508695-1-maddy@linux.ibm.com
arch/powerpc/include/asm/imc-pmu.h
arch/powerpc/perf/imc-pmu.c