[RISCV] Add codegen for RV32F arithmetic and conversion operations
authorAlex Bradbury <asb@lowrisc.org>
Tue, 20 Mar 2018 12:45:35 +0000 (12:45 +0000)
committerAlex Bradbury <asb@lowrisc.org>
Tue, 20 Mar 2018 12:45:35 +0000 (12:45 +0000)
commit76c29ee8158142b9c97ad56f5da7f99970bbbd9f
treeb3dea9690ace28baf1391f4d8dc5c7fcca49ac0d
parentdca383123fa560b0076c374d133e4059367c18bd
[RISCV] Add codegen for RV32F arithmetic and conversion operations

Currently, only a soft floating point ABI is supported.

llvm-svn: 327976
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVInstrInfoF.td
llvm/test/CodeGen/RISCV/float-arith.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/float-convert.ll [new file with mode: 0644]