arm64: zynqmp: Label whole PL part as fpga_full region
authorNava kishore Manne <nava.manne@xilinx.com>
Mon, 22 May 2017 06:35:17 +0000 (12:05 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 28 Nov 2017 15:09:08 +0000 (16:09 +0100)
commit7689dce753195000ceeb32274fc802cf957f24dc
tree154a70d63f6cdda98c1afea5b53ed18886ec6193
parent6db82e09564f2ba6bb017d91e9920cdde0e1fb37
arm64: zynqmp: Label whole PL part as fpga_full region

This will simplify dt overlay structure for the whole PL.

Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/dts/zynqmp.dtsi