[AMDGPU] SI Load Store Optimizer: When merging with offset, use V_ADD_{I|U}32_e64
authorMark Searles <m.c.searles@gmail.com>
Mon, 22 Jan 2018 21:46:43 +0000 (21:46 +0000)
committerMark Searles <m.c.searles@gmail.com>
Mon, 22 Jan 2018 21:46:43 +0000 (21:46 +0000)
commit7687d4205242a47ff49e6b241e80d871a5956ec2
treeedeb460935b45a6d617fbf4b85d97fcd999523fe
parente8ea8296fccc6d9345817ece7d2f4ea3b35a55e1
[AMDGPU] SI Load Store Optimizer: When merging with offset, use V_ADD_{I|U}32_e64
- Change inserted add ( V_ADD_{I|U}32_e32 ) to _e64 version ( V_ADD_{I|U}32_e64 ) so that the add uses a vreg for the carry; this prevents inserted v_add from killing VCC; the _e64 version doesn't accept a literal in its encoding, so we need to introduce a mov instr as well to get the imm into a register.
- Change pass name to "SI Load Store Optimizer"; this removes the '/', which complicates scripts.

Differential Revision: https://reviews.llvm.org/D42124

llvm-svn: 323153
llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
llvm/test/CodeGen/AMDGPU/ds-combine-large-stride.ll
llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir [new file with mode: 0644]