arm: tegra: Fix the CPU complex reset masks
authorAlban Bedel <alban.bedel@avionic-design.de>
Wed, 20 Nov 2013 16:42:46 +0000 (17:42 +0100)
committerTom Warren <twarren@nvidia.com>
Wed, 18 Dec 2013 17:19:49 +0000 (10:19 -0700)
commit766afc3dff35f8f257deb0373735a328c8206880
tree2813b7f9f6934e88dcb4831f49474eafd0837842
parent8f38038193752d3719f39ccd562f7ffdf83989d5
arm: tegra: Fix the CPU complex reset masks

The CPU complex reset masks are not matching with the datasheet for
the CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET/CLR_0 registers. For both T20
and T30 the register consist of groups of 4 bits, with one bit for
each CPU core. On T20 the 2 high bits of each group are always stubbed
as there is only 2 cores.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swrren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/include/asm/arch-tegra/clock.h