i965/gen7: Handle atomic instructions from the FS back-end.
authorFrancisco Jerez <currojerez@riseup.net>
Wed, 25 Sep 2013 23:30:20 +0000 (16:30 -0700)
committerFrancisco Jerez <currojerez@riseup.net>
Mon, 4 Nov 2013 20:12:37 +0000 (12:12 -0800)
commit764f40d92edfdfea4ea2b092fd1ba7888cc7ea7e
tree4e518b94d7ace6cd78270c84add68abfd412d8b1
parent34fe051e215107dddbaae71e2edf15f88d839936
i965/gen7: Handle atomic instructions from the FS back-end.

This can deal with all the 15 32-bit untyped atomic operations the
hardware supports, but only INC and PREDEC are going to be exposed
through the API for now.

v2: Represent atomics as GLSL intrinsics.  Add support for variably
    indexed atomic counter arrays.  Fix interaction with fragment
    discard.
v3: Add comment on why we don't need to assign uniform storage for
    atomic counters.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
src/mesa/drivers/dri/i965/brw_fs.h
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp