clk: socfpga: stratix10: use new parent data scheme
authorDinh Nguyen <dinguyen@kernel.org>
Tue, 12 May 2020 18:16:43 +0000 (13:16 -0500)
committerStephen Boyd <sboyd@kernel.org>
Wed, 27 May 2020 02:13:05 +0000 (19:13 -0700)
commit762d961aee4042282b83db557edff305eb8a1713
tree3ec896aefeee4c5b9349bc0ea76e92b945f2ed3b
parent8f3d9f354286745c751374f5f1fcafee6b3f3136
clk: socfpga: stratix10: use new parent data scheme

Convert, where possible, the stratix10 clock driver to the new parent
data scheme by specifying the parent data for clocks that have multiple
parents.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lkml.kernel.org/r/20200512181647.5071-1-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/socfpga/clk-gate-s10.c
drivers/clk/socfpga/clk-periph-s10.c
drivers/clk/socfpga/clk-pll-s10.c
drivers/clk/socfpga/clk-s10.c
drivers/clk/socfpga/stratix10-clk.h