dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC
authorYash Shah <yash.shah@sifive.com>
Tue, 8 Dec 2020 04:55:33 +0000 (10:25 +0530)
committerPalmer Dabbelt <palmerdabbelt@google.com>
Fri, 8 Jan 2021 01:37:24 +0000 (17:37 -0800)
commit75e6d7248efccc2b13d0f3811b29d3e5cb04bcad
treede17be73d6d80596bbbfa95cd693d4f77aaf513c
parent507308b8ccc90d37b07bfca8ffe130435d6b354f
dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC

Add new compatible strings in cpus.yaml to support the E71 and U74 CPU
cores ("harts") that are present on FU740-C000 SoC.

Signed-off-by: Yash Shah <yash.shah@sifive.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Documentation/devicetree/bindings/riscv/cpus.yaml