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(parent: 196de71) | patch
clk: mediatek: Add MT8173 MMPLL change rate support
authorJames Liao <jamesjj.liao@mediatek.com>
Fri, 10 Jul 2015 08:39:34 +0000 (16:39 +0800)
committerStephen Boyd <sboyd@codeaurora.org>
Tue, 28 Jul 2015 18:58:57 +0000 (11:58 -0700)
commit75ce0cdb6243d42daca6130e5feb71f536bb136e
treebaa25bb3aceeb8638dc98938c02ddd9ae2470ebctree | snapshot
parent196de71a9d9e9090406a87362d22b67ae633fa7acommit | diff
clk: mediatek: Add MT8173 MMPLL change rate support

MT8173 MMPLL frequency settings are different from common PLLs.
It needs different post divider settings for some ranges of frequency.
This patch add support for MT8173 MMPLL frequency setting by adding
div-rate table to lookup suitable post divider setting under a
specified frequency.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/mediatek/clk-mt8173.c diff | blob | history
drivers/clk/mediatek/clk-mtk.h diff | blob | history
drivers/clk/mediatek/clk-pll.c diff | blob | history
Domain: System / Kernel;