sh_eth: fix TRSCER mask for R7S72100
authorSergey Shtylyov <s.shtylyov@omprussia.ru>
Sun, 28 Feb 2021 20:26:34 +0000 (23:26 +0300)
committerDavid S. Miller <davem@davemloft.net>
Mon, 1 Mar 2021 21:22:34 +0000 (13:22 -0800)
commit75be7fb7f978202c4c3a1a713af4485afb2ff5f6
tree34a1c68e50288a6f9004b954c269c65981b83df7
parent8c91bc3d44dfef8284af384877fbe61117e8b7d1
sh_eth: fix TRSCER mask for R7S72100

According  to  the RZ/A1H Group, RZ/A1M Group User's Manual: Hardware,
Rev. 4.00, the TRSCER register has bit 9 reserved, hence we can't use
the driver's default TRSCER mask.  Add the explicit initializer for
sh_eth_cpu_data::trscer_err_mask for R7S72100.

Fixes: db893473d313 ("sh_eth: Add support for r7s72100")
Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/renesas/sh_eth.c