projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: aedb328) | patch
[RISCV] Convert (splat_vector (load)) to vlse with 0 stride.
authorCraig Topper <craig.topper@sifive.com>
Tue, 14 Dec 2021 16:58:16 +0000 (08:58 -0800)
committerCraig Topper <craig.topper@sifive.com>
Tue, 14 Dec 2021 17:14:03 +0000 (09:14 -0800)
commit7598ac5ec5a6bebc347ce95daf3be7a62ab2888e
tree8341fda021be73acd7a44f48be7d4c32a34da675tree | snapshot
parentaedb328a4dc9cb48ee3cf3198281649ea2c4f532commit | diff
[RISCV] Convert (splat_vector (load)) to vlse with 0 stride.

We already do this for splat nodes that carry a VL, but not for
splats that use VLMAX.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D115483
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp diff | blob | history
llvm/test/CodeGen/RISCV/rvv/vsplats-fp.ll diff | blob | history
Domain: System / Toolchain;