[NVPTX] Drop memory references of LDG/LDU

[NVPTX] Drop memory references of LDG/LDU

This patch fixes machine verifier errors:

    *** Bad machine code: Missing mayLoad flag ***
    - function:    foo1
    - basic block: %bb.0  (0x5560fc64ef08)
    - instruction: %4:float32regs =
	INT_PTX_LDG_GLOBAL_f32areg64 killed %3:int64regs
	:: (load (s32) from %ir.from1, addrspace 1)

mayLoad flag is missing because LDG and LDU instructions operate on
read-only memory, so we want to treat them as regular instructions and
exclude them from memory analysis.

Machine verifier checks for memoperands to determine whether an
instruction is a load, so dropping them during lowering fixes the
problem.

Differential Revision: https://reviews.llvm.org/D112466