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MIPS: Oceton: Update model detection code for new chips.
authorDavid Daney <david.daney@cavium.com>
Tue, 22 Nov 2011 14:46:49 +0000 (14:46 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 7 Dec 2011 22:03:28 +0000 (22:03 +0000)
commit751c9f684963d2a066a79d8022c0e79e1159291b
tree9a196a7c5bab11fe4e089e691e2f00593e51826atree | snapshot
parent506d24be55d510c7ff79a0cdcabd00649b979bc9commit | diff
MIPS: Oceton: Update model detection code for new chips.

Several newer chips were not covered, update the code to detect them.
This necessitates updating cvmx-mio-defs.h as well, because it has new
and required definitions.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2939/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/cavium-octeon/executive/octeon-model.c diff | blob | history
arch/mips/include/asm/octeon/cvmx-mio-defs.h diff | blob | history
arch/mips/include/asm/octeon/octeon-model.h diff | blob | history
Domain: System / Uncategorized;