[AArch64] Add some float -> int -> float conversion patterns
authorSjoerd Meijer <sjoerd.meijer@arm.com>
Fri, 19 Mar 2021 14:16:17 +0000 (14:16 +0000)
committerSjoerd Meijer <sjoerd.meijer@arm.com>
Mon, 22 Mar 2021 11:06:08 +0000 (11:06 +0000)
commit7515e81e8c58ca07ac5fede7149634c0dfacae8a
tree518206cbf56a65b6f493ad8720233b0ceea85168
parent02b51e5316cd501ede547d0223e0f5416ebd9845
[AArch64] Add some float -> int -> float conversion patterns

This adds some conversion match patterns for which we want to keep the int
values in FP registers using the corresponding NEON instructions (not the FP
instructions) to avoid more costly int <-> fp register transfers.

Differential Revision: https://reviews.llvm.org/D98956
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/test/CodeGen/AArch64/cvt-fp-int-fp.ll [new file with mode: 0644]