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i965/vs: Do round-robin register allocation on gen6+ like we do in the FS. 05/6405/1
authorEric Anholt <eric@anholt.net>
Mon, 29 Apr 2013 18:48:22 +0000 (11:48 -0700)
committerEric Anholt <eric@anholt.net>
Thu, 2 May 2013 22:54:09 +0000 (15:54 -0700)
commit74e670d0a39ee0e7b26a65ee727ff9245b052878
tree8383b40163c7707784667fad9ec8b08c3070e7c2tree | snapshot
parent15e64de9e68e99579a0a2fbc80763a5bb64267eacommit | diff
i965/vs: Do round-robin register allocation on gen6+ like we do in the FS.

This will free instruction scheduling to make better choices.  No
statistically significant performance difference on GLB2.7 (n=93).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp diff | blob | history
Domain: Graphics System / GL;