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dt-bindings: phy: ti: gmii-sel: add support for am654x/j721e soc
authorGrygorii Strashko <grygorii.strashko@ti.com>
Tue, 3 Mar 2020 16:00:26 +0000 (18:00 +0200)
committerKishon Vijay Abraham I <kishon@ti.com>
Fri, 20 Mar 2020 14:04:29 +0000 (19:34 +0530)
commit74e29703a78c120cd129e2b49ac8213713d2648c
tree6131881cbf838c435afc68ada92626b83b06fbcetree | snapshot
parent6076967a500c4c6dad19d10d71863db1590a35edcommit | diff
dt-bindings: phy: ti: gmii-sel: add support for am654x/j721e soc

TI AM654x/J721E SoCs have the same PHY interface selection mechanism for
CPSWx subsystem as TI SoCs (AM3/4/5/DRA7), but registers and bit-fields
placement is different.

This patch adds corresponding compatible strings to enable support for TI
AM654x/J721E SoCs.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt diff | blob | history
Domain: System / Kernel;