[X86] Adjust some IceLake integer shuffle schedule classes (PR48110)
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 14 Dec 2021 18:55:59 +0000 (18:55 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 14 Dec 2021 18:56:13 +0000 (18:56 +0000)
commit74d1fc742af0a5a766dbfa9f7a1a715301e05d3f
tree202b06523f94f6d8d7f01fc63c6961c97ba4217e
parent3926893439c419055b43df4f37db354cde3d02c2
[X86] Adjust some IceLake integer shuffle schedule classes (PR48110)

The IceLake scheduler model is still mainly a copy of the SkylakeServer model.

This patch adjusts the integer shuffle classes to account for most instructions now working on Port 1 as well as Port 5.

This is based off Agner + uops.info as well as the PR48110 report.

Differential Revision: https://reviews.llvm.org/D115547
llvm/lib/Target/X86/X86SchedIceLake.td
llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx1.s
llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx2.s
llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512bwvl.s
llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512vl.s
llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse2.s
llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse41.s
llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-ssse3.s