drm/amdgpu: Fix bugs in setting CP RB/MEC DOORBELL_RANGE registers
authorYong Zhao <Yong.Zhao@amd.com>
Tue, 5 Feb 2019 20:17:40 +0000 (15:17 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 13 Feb 2019 22:51:02 +0000 (17:51 -0500)
commit74b9b3ea0cb355d668eb0309d1ab57f403d52c69
treecea92b3a1675e39cea67e41d9e8460af190c76f6
parent2d086fded1021d6b482dfc705bab8f085d10a496
drm/amdgpu: Fix bugs in setting CP RB/MEC DOORBELL_RANGE registers

CP_RB_DOORBELL_RANGE_LOWER/UPPER and CP_MEC_DOORBELL_RANGE_LOWER/UPPER
are used for waking up an idle scheduler and for power gating support.
Usually the first few doorbells in pci doorbell bar are used for RB
and all leftover for MEC. This patch fixes the incorrect settings.

Theoretically, gfx ring doorbells should come before all MEC doorbells
to be consistent with the design. However, since the doorbell
allocations are agreed by all and we are not free to change them, also
considering the kernel MEC ring doorbells which are before gfx ring
doorbells are not used often, we compromise by leaving the doorbell
allocations unchanged.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c