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(parent: 9123908) | patch
[RDF] Switch RegisterAggr to a bit vector of register units
authorKrzysztof Parzyszek <kparzysz@codeaurora.org>
Fri, 14 Apr 2017 17:25:13 +0000 (17:25 +0000)
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>
Fri, 14 Apr 2017 17:25:13 +0000 (17:25 +0000)
commit74b1f254d4fc60434035133d47723a97544ed8f1
tree95ad34b0ea95ac7405b7ecf11c9f46f12eac4cd3tree | snapshot
parent91239088a1ac30b142b91cb00314aca759627321commit | diff
[RDF] Switch RegisterAggr to a bit vector of register units

This avoids many complications related to the complex register
aliasing schemes.

llvm-svn: 300345
llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp diff | blob | history
llvm/lib/Target/Hexagon/RDFGraph.cpp diff | blob | history
llvm/lib/Target/Hexagon/RDFLiveness.cpp diff | blob | history
llvm/lib/Target/Hexagon/RDFRegisters.cpp diff | blob | history
llvm/lib/Target/Hexagon/RDFRegisters.h diff | blob | history
Domain: System / Toolchain;