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openrisc: tlb miss handler optimizations
authorStefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Thu, 1 Aug 2013 07:46:10 +0000 (10:46 +0300)
committerStafford Horne <shorne@gmail.com>
Mon, 6 Feb 2017 12:50:42 +0000 (21:50 +0900)
commit742fb582b4540a7b59427dc67be1fe4a5eac7078
tree8816ae13e2f26150a9733486b757ced6ed089d50tree | snapshot
parent3e06a16339303016b2c57b350a15afeaa7ba7813commit | diff
openrisc: tlb miss handler optimizations

By slightly reorganizing the code, the number of registers
used in the tlb miss handlers can be reduced by two,
thus removing the need to save them to memory.

Also, some dead and commented out code is removed.

No functional change.

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Jonas Bonn <jonas@southpole.se>
Signed-off-by: Stafford Horne <shorne@gmail.com>
arch/openrisc/kernel/head.S diff | blob | history
Domain: System / Kernel;