[X86][Costmodel] Load/store i16 Stride=2 VF=32 interleaving costs
authorRoman Lebedev <lebedev.ri@gmail.com>
Mon, 27 Sep 2021 11:15:58 +0000 (14:15 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Mon, 27 Sep 2021 11:21:12 +0000 (14:21 +0300)
commit7424deb7433180ecb1c4722259f151c5c252be64
treec3291396ffb3a74224b489aecf96d7033bba4af3
parenta5113e9445ae024af5ba2084917c9fd115407efc
[X86][Costmodel] Load/store i16 Stride=2 VF=32 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/q6GbK89br - for intels `Block RThroughput: =18.0`; for ryzens, `Block RThroughput: <=7.0`
So pick cost of `18`.

For store we have:
https://godbolt.org/z/Yzfoo5TnW - for intels `Block RThroughput: =8.0`; for ryzens, `Block RThroughput: <=4.0`
So pick cost of `8`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110507
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-2.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-2.ll