[AArch64] Add lane moves to PerfectShuffle tables
authorDavid Green <david.green@arm.com>
Tue, 19 Apr 2022 13:49:50 +0000 (14:49 +0100)
committerDavid Green <david.green@arm.com>
Tue, 19 Apr 2022 13:49:50 +0000 (14:49 +0100)
commit73dc996428aeed7e5005b4bc80a112f7d5c45a9b
tree8ddfcffee04db8b6479aa71669ec2e78c33ccc38
parent7adfa31bc65e44ce65ee47ebe27e61695b34805a
[AArch64] Add lane moves to PerfectShuffle tables

This teaches the perfect shuffle tables about lane inserts, that can
help reduce the cost of many entries. Many of the shuffle masks are
one-away from being correct, and a simple lane move can be a lot simpler
than trying to use ext/zip/etc. Because they are not exactly like the
other masks handled in the perfect shuffle tables, they require special
casing to generate them, with a special InsOp Operator.

The lane to insert into is encoded as the RHSID, and the move from is
grabbed from the original mask. This helps reduce the maximum perfect
shuffle entry cost to 3, with many more shuffles being generatable in a
single instruction.

Differential Revision: https://reviews.llvm.org/D123386
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
llvm/test/CodeGen/AArch64/arm64-dup.ll
llvm/test/CodeGen/AArch64/arm64-rev.ll
llvm/test/CodeGen/AArch64/insert-extend.ll
llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
llvm/test/CodeGen/AArch64/neon-wide-splat.ll
llvm/test/CodeGen/AArch64/shuffle-tbl34.ll
llvm/test/CodeGen/AArch64/shuffles.ll
llvm/utils/PerfectShuffle/PerfectShuffle.cpp