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(parent: 744713a) | patch
powerpc/mpc8xxx: Add fine timing support for DDR3
authorYork Sun <yorksun@freescale.com>
Fri, 17 Aug 2012 08:22:37 +0000 (08:22 +0000)
committerAndy Fleming <afleming@freescale.com>
Thu, 23 Aug 2012 17:16:55 +0000 (12:16 -0500)
commit73b5396b25c52463aa71c782316e2d77a4b8d5ed
treeb6e82b205f1dc1a2d4a1eac37ec136cbe22822fatree | snapshot
parent744713a6a3ca19c77585a9452829a2e2a55693adcommit | diff
powerpc/mpc8xxx: Add fine timing support for DDR3

When the DDR3 speed goes higher, we need to utilize fine offset
from SPD.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c diff | blob | history
arch/powerpc/cpu/mpc8xxx/ddr/interactive.c diff | blob | history
arch/powerpc/include/asm/fsl_ddr_dimm_params.h diff | blob | history
include/ddr_spd.h diff | blob | history
Domain: System / Kernel;