dt-bindings: phy: ti: phy-gmii-sel: Add support for J784S4 CPSW9G
authorSiddharth Vadapalli <s-vadapalli@ti.com>
Wed, 15 Mar 2023 09:24:08 +0000 (14:54 +0530)
committerVinod Koul <vkoul@kernel.org>
Wed, 12 Apr 2023 16:38:00 +0000 (22:08 +0530)
commit73b46467cac027fe6cbe6585946726b53b80bfdb
tree78ee5f825a38134831f6b1fb3a118765059d4441
parent57c0e1362fdd57d0cea7ab1e583b58abf4bd8c2d
dt-bindings: phy: ti: phy-gmii-sel: Add support for J784S4 CPSW9G

The CPSW9G instance of CPSW Ethernet Switch on TI's J784S4 SoC supports
additional PHY modes like QSGMII. Add a compatible for it.

Enable the use of "ti,qsgmii-main-ports" property for J784S4 CPSW9G.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230315092408.1722114-1-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml