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author	Muhammad Omair Javaid <omair.javaid@linaro.org>
	Tue, 22 Sep 2020 09:20:10 +0000 (14:20 +0500)
committer	Muhammad Omair Javaid <omair.javaid@linaro.org>
	Tue, 22 Sep 2020 09:40:06 +0000 (14:40 +0500)
commit	73a6a164b84a8195defbb8f5eeb6faecfc478ad4
tree	4b2a3a0597abce7236767de147e721fd4ab4f180	tree \| snapshot
parent	66bcb14312a08b5d7e1197d23d748b2e23c4d852	commit \| diff

Revert "Reapply Revert "RegAllocFast: Rewrite and improve""

This reverts commit 55f9f87da2c2ad791b9e62cccb1c035e037444fa.

Breaks following buildbots:
http://lab.llvm.org:8011/builders/lldb-arm-ubuntu/builds/4306
http://lab.llvm.org:8011/builders/lldb-aarch64-ubuntu/builds/9154

186 files changed:

lldb/test/Shell/SymbolFile/NativePDB/disassembly.cpp		diff \| blob \| history
llvm/lib/CodeGen/RegAllocFast.cpp		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/darwin-tls-call-clobber.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/arm64-fast-isel-br.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/arm64_32-fastisel.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/arm64_32-null.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/br-cond-not-merge.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/cmpxchg-O0.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/combine-loads.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/fast-isel-cmpxchg.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/popcount.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/swift-return.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/swifterror.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/unwind-preserved-from-mir.mir		diff \| blob \| history
llvm/test/CodeGen/AArch64/unwind-preserved.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/fast-ra-kills-vcc.mir	[deleted file]	blob \| history
llvm/test/CodeGen/AMDGPU/fastregalloc-illegal-subreg-physreg.mir	[deleted file]	blob \| history
llvm/test/CodeGen/AMDGPU/fastregalloc-self-loop-heuristic.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/reserve-vgpr-for-sgpr-spill.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/spill-agpr.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/spill-m0.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/spill192.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/unexpected-reg-unit-state.mir	[deleted file]	blob \| history
llvm/test/CodeGen/AMDGPU/wwm-reserved.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/Windows/alloca.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/cmpxchg-O0-be.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/cmpxchg-O0.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/crash-greedy-v6.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/debug-info-blocks.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/fast-isel-call.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/fast-isel-ldr-str-thumb-neg-index.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/fast-isel-select.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/fast-isel-vararg.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/ldrd.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/legalize-bitcast.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/pr47454.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/stack-guard-reassign.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/swifterror.ll		diff \| blob \| history
llvm/test/CodeGen/ARM/thumb-big-stack.ll		diff \| blob \| history
llvm/test/CodeGen/Hexagon/vect/vect-load-v4i16.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/Fast-ISel/callabi.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/Fast-ISel/memtest1.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/aggregate_struct_return.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitreverse.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/branch.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/brindirect.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bswap.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/call.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/ctlz.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/ctpop.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/cttz.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/dyn_stackalloc.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fcmp.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/float_constants.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fptosi_and_fptoui.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address_pic.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/icmp.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/jump_table_and_brjt.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_4_unaligned.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_split_because_of_memsize_or_align.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/long_ambiguous_chain_s32.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/long_ambiguous_chain_s64.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/mul.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/mul_vec.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/phi.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/rem_and_div.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sitofp_and_uitofp.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store_4_unaligned.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store_split_because_of_memsize_or_align.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub_vec.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/test_TypeInfoforMF.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/var_arg.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/zextLoad_and_sextLoad.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/zext_and_sext.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/atomic-min-max.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/atomic.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/atomic64.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/atomicCmpSwapPW.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/copy-fp64.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/implicit-sret.ll		diff \| blob \| history
llvm/test/CodeGen/Mips/micromips-eva.mir		diff \| blob \| history
llvm/test/CodeGen/Mips/msa/ldr_str.ll		diff \| blob \| history
llvm/test/CodeGen/PowerPC/addegluecrash.ll		diff \| blob \| history
llvm/test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll		diff \| blob \| history
llvm/test/CodeGen/PowerPC/aix-overflow-toc.py		diff \| blob \| history
llvm/test/CodeGen/PowerPC/anon_aggr.ll		diff \| blob \| history
llvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll		diff \| blob \| history
llvm/test/CodeGen/PowerPC/elf-common.ll		diff \| blob \| history
llvm/test/CodeGen/PowerPC/fast-isel-pcrel.ll		diff \| blob \| history
llvm/test/CodeGen/PowerPC/fp-int128-fp-combine.ll		diff \| blob \| history
llvm/test/CodeGen/PowerPC/fp-strict-fcmp-noopt.ll		diff \| blob \| history
llvm/test/CodeGen/PowerPC/fp64-to-int16.ll		diff \| blob \| history
llvm/test/CodeGen/PowerPC/p9-vinsert-vextract.ll		diff \| blob \| history
llvm/test/CodeGen/PowerPC/popcount.ll		diff \| blob \| history
llvm/test/CodeGen/PowerPC/spill-nor0.ll		diff \| blob \| history
llvm/test/CodeGen/PowerPC/spill-nor0.mir	[deleted file]	blob \| history
llvm/test/CodeGen/PowerPC/stack-guard-reassign.ll		diff \| blob \| history
llvm/test/CodeGen/PowerPC/vsx-args.ll		diff \| blob \| history
llvm/test/CodeGen/PowerPC/vsx.ll		diff \| blob \| history
llvm/test/CodeGen/SPARC/fp16-promote.ll		diff \| blob \| history
llvm/test/CodeGen/SystemZ/swift-return.ll		diff \| blob \| history
llvm/test/CodeGen/SystemZ/swifterror.ll		diff \| blob \| history
llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll		diff \| blob \| history
llvm/test/CodeGen/Thumb2/high-reg-spill.mir		diff \| blob \| history
llvm/test/CodeGen/Thumb2/mve-vector-spill.ll		diff \| blob \| history
llvm/test/CodeGen/X86/2009-04-14-IllegalRegs.ll		diff \| blob \| history
llvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll		diff \| blob \| history
llvm/test/CodeGen/X86/2013-10-14-FastISel-incorrect-vreg.ll		diff \| blob \| history
llvm/test/CodeGen/X86/atomic-monotonic.ll		diff \| blob \| history
llvm/test/CodeGen/X86/atomic-unordered.ll		diff \| blob \| history
llvm/test/CodeGen/X86/atomic32.ll		diff \| blob \| history
llvm/test/CodeGen/X86/atomic64.ll		diff \| blob \| history
llvm/test/CodeGen/X86/atomic6432.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx-load-store.ll		diff \| blob \| history
llvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll		diff \| blob \| history
llvm/test/CodeGen/X86/bug47278-eflags-error.mir	[deleted file]	blob \| history
llvm/test/CodeGen/X86/bug47278.mir	[deleted file]	blob \| history
llvm/test/CodeGen/X86/crash-O0.ll		diff \| blob \| history
llvm/test/CodeGen/X86/extend-set-cc-uses-dbg.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fast-isel-cmp-branch.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fast-isel-nontemporal.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fast-isel-select-sse.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fast-isel-select.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fast-isel-x86-64.ll		diff \| blob \| history
llvm/test/CodeGen/X86/mixed-ptr-sizes-i686.ll		diff \| blob \| history
llvm/test/CodeGen/X86/mixed-ptr-sizes.ll		diff \| blob \| history
llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll		diff \| blob \| history
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