arm: socfpga: gen5: add reset & sdr node to SPL devicetrees
authorSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Fri, 1 Mar 2019 19:12:29 +0000 (20:12 +0100)
committerMarek Vasut <marex@denx.de>
Wed, 17 Apr 2019 20:20:16 +0000 (22:20 +0200)
commit7357c2cbc0b4c4c0cf2d6fa1253cda6f77cf06da
tree6bd5fd12d895041604fe3376c28c727644cef55a
parent42a37d977403d1632bf528013d45c9e6fd5c679c
arm: socfpga: gen5: add reset & sdr node to SPL devicetrees

The SPL for socfpga gen5 currently takes all peripherals out of reset
unconditionally. To implement proper reset handling for peripherals,
the reset node has to be provided with the SPL dts.

In preparation to move the DDR driver to DM, the sdr node is required
in SPL, too.

This patch adds "u-boot,dm-pre-reloc" to U-Boot specific dtsi addon
files so that the reset manager and SDR driver correctly probe in SPL.
It centralizes these settings into a common file since in contrast to
boot-type specific nodes, "soc", "rst" and "sdr" are always needed.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
12 files changed:
arch/arm/dts/socfpga-common-u-boot.dtsi [new file with mode: 0644]
arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi
arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi
arch/arm/dts/socfpga_cyclone5_de10_nano.dts
arch/arm/dts/socfpga_cyclone5_de1_soc.dts
arch/arm/dts/socfpga_cyclone5_is1.dts
arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi
arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi
arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi
arch/arm/dts/socfpga_cyclone5_sr1500.dts
arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi