[PowerPC] Avoid scalarization of vector truncate
authorRoland Froese <froese@ca.ibm.com>
Mon, 11 Feb 2019 17:29:14 +0000 (17:29 +0000)
committerRoland Froese <froese@ca.ibm.com>
Mon, 11 Feb 2019 17:29:14 +0000 (17:29 +0000)
commit732fe22454da7d7b4e331b8ab8ea104a37ba36eb
tree7258a7b70bd9bc3e286324e4549012670c7de823
parentebdb021031a92a569d457ff4d79a09b73752558d
[PowerPC] Avoid scalarization of vector truncate

The PowerPC code generator currently scalarizes vector truncates that would fit in a vector register, resulting in vector extracts, scalar operations, and vector merges. This patch custom lowers a vector truncate that would fit in a register to a vector shuffle instead.

Differential Revision: https://reviews.llvm.org/D56507

llvm-svn: 353724
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.h
llvm/test/CodeGen/PowerPC/vec-trunc.ll