drm/i915/display: Match PSR2 selective fetch sequences with specification
authorJosé Roberto de Souza <jose.souza@intel.com>
Wed, 22 Sep 2021 21:52:41 +0000 (14:52 -0700)
committerJosé Roberto de Souza <jose.souza@intel.com>
Thu, 23 Sep 2021 17:06:16 +0000 (10:06 -0700)
commit73262db68c27ed25452ffd3b57e051e1791de713
treeb8e990a6e19076ad9aaff75a73888c77524caaea
parent27493cb8747e8389a70a053445daf6a5c7888c3c
drm/i915/display: Match PSR2 selective fetch sequences with specification

We were not completely following the selective fetch programming
sequence, here some things we were doing wrong:
- not programming plane selective fetch a PSR2_MAN_TRK_CTL registers
when doing a modeset
- programming PSR2_MAN_TRK_CTL out of vblank

With this changes the last remainig underrun found in Alderlake-P is
fixed.

Bspec: 55229
Tested-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210922215242.66683-2-jose.souza@intel.com
drivers/gpu/drm/i915/display/intel_cursor.c
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_psr.c
drivers/gpu/drm/i915/display/intel_psr.h
drivers/gpu/drm/i915/display/skl_universal_plane.c